XDR™2 DRAM

Rambus' XDR™2 DRAM is a high-performance, power-efficient memory, optimized for high-bandwidth applications such as gaming, graphics and multi-core computing. Initial devices are capable of 9.6Gbps data rates providing up to 38.4GB/s of bandwidth from a single 4-byte-wide device. The roadmap for XDR2 extends to 12.8Gbps data rates providing 51.2GB/s of bandwidth per device.

The XDR2 DRAM uses a traditional 8-bank CMOS DRAM core, with standard and micro-threaded operating modes. XDR DRAM support device densities from 512Mbit to 4Gbit with initial devices targeting 1 Gbit density. In addition to using Rambus micro-threading, XDR2 DRAM also incorporates other Rambus innovations such as Flexlink™C/A: the industry's first full-speed, scalable point-to-point command/address channel. Flexlink C/A, combined with programmable DRAM width and Enhanced Dynamic Point-to-Point (DPP), allows for highly scalable memory system capacity and access granularity, making XDR2 the ideal solution for a wide range of applications.

Micro-threading is a new operating mode available in XDR2 DRAM which effectively doubles the number of individually addressable, simultaneously accessible banks. A standard 8-bank core can thus perform effectively as a 16-bank memory device, reducing column access granularity and increasing usable bandwidth to the controller.

XDR2 in micro-threaded mode, is optimized to efficiently access memory to meet the demands of graphics and multi-core computing systems. By allowing different quads of the DRAM to be independently selected through respective Flexlink C/A channels, the XDR2 DRAM appears logically as four independent DRAM devices. Each access thread transmits and receives data using a dedicated byte lane, providing the needed data to sustain advanced graphics and compute applications. Furthermore, XDR2 DRAM achieves high data rates with a low access granularity of 32Bytes using a conventional low-cost DRAM core.